Monday, 23 May 2022

Study on the Developmental Written Performance by Enhancing Internal Parallelism of Solid State Drives | Chapter 06 | Research Developments in Science and Technology Vol. 5

 Most Solid State Drive architectural research focuses on Flash Translation Layer (FTL) algorithms and wear levelling; however, intrinsic parallelism in Solid State Drives has received less attention. I presented a novel technique to increase SSD write speed by increasing intrinsic parallelism within SSDs in this study. An SDRAM buffer is used to buffer and schedule write requests in the architecture. Because identical logical block numbers may be translated to different physical numbers at different points in FTL, the on-board DRAM buffer is utilised to buffer requests at the lower level of FTL. When the buffer is filled, the same amount of data is assigned to each storage package in the SSDs to promote internal parallelism. All SSD configurations in this study are identical to prevent performance differences caused by faster buffers or caches Study uses both simulated workloads and real-world applications in trials to appropriately measure performance. Because it is inappropriate to compare an SSD with a buffer to an SSD without a buffer, I compare the increased internal parallelism method to the typical LRU technique. The simulation results show that our design's writing performance is much better than the LRU-cache technique with the same number of buffer sizes.



Author(S) Details

Mohammed I. Alghamdi
Department of Engineering and Computer Sciences, College of Computer Science and Information Technology, Al-Baha University, Saudi Arabia.

View Book:- https://stm.bookpi.org/RDST-V5/article/view/6867

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