This paper reports on 3C-SiC low-doped drain power
MOSFET design and simulation, including key parameters such as the model of
avalanche effect ionisation and its relationship to breakdown voltage, the
doping dependence of bulk mobility, and the relationship between on-resistance
and breakdown voltage. While scaling the parasitic JFET, a number of MOSFETs
were built with different blocking layer doping. To mitigate localised
breakdown at the p-well / n-type drift layer interface, a stepped doping
profile is used. Using a commercially available 2D simulation software, the
characteristics of the MOSFETs were obtained. Comparisons made with a 1D
analytical model indicate strong agreement between the on-state resistance,
current-voltage characteristics, sub-threshold slope and the overall validity
of the existing simulation models. As
long as there is a proper inclusion of the body impact. Simulation results show
that a 600 V, 3C-SiC MOSFET with a thinned substrate, containing a drift layer
of 7 ⁇ m and a blocking layer doping density of 1x1016 cm-3, can have an
on-state resistance of 0.8 mW-cm2 for the selected material parameters
Author (s) Details
Dr.
Hamid Fardi
University of Colorado, Denver Colorado, 1200
Larimer Square, CO 80217-3364, USA.
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