Digital Signal Processing is the processing of the analog
signal into digital signal. Present epoch of
Digital Signal Processor’s need a rapid and very
compacted processor’s. The Digital Signal
Processing enables the analog audio and video signals
to process, transmit, store, reproduce and
manipulate the information from one form to another
form. But size of the system increases if the all
the processing is to be done and as the size increases
the delay also increases. Area of the system is
very important parameter to be considered than the
accuracy in the present constraint. Hence we
concentrate on reducing the area and increasing the
speed of the processor. Hence in this paper we
state the concept of inexactness and we apply the same
to some DSP processor application. This
paper was designed using MIPS Verilog HDL. The design
was synthesized and simulated in Xilinx
14.2 ISE. The power Calculations were calculated using
Isim, a tool of Xilinx Xpower Analyzer.
Author(s) Details
P. V. S. R. Bharadwaja
Department of ECE, Sree Vidyanikethan Engineering College, A.
Rangampet, Tirupati, Andhra Pradesh – 517102, India.
M. Venkata Naresh
Department of ECE, Sree Vidyanikethan Engineering College, A.
Rangampet, Tirupati, Andhra Pradesh – 517102, India.
Neelima Koppala
Department of ECE, Sree Vidyanikethan Engineering College, A.
Rangampet, Tirupati, Andhra Pradesh – 517102, India.
J. Sai Krishna
Department of ECE, SVCEW, Tirupati, A.P., India.
View Book :- https://bp.bookpi.org/index.php/bpi/catalog/book/236
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