Saturday, 5 November 2022

A Scalable Hardware Circuit for Factoring an n-bit Integer: Analytic and Computational Perspectives | Chapter 4 | Research Highlights in Mathematics and Computer Science Vol. 2

 This unit addresses a prominent problem namely ubiquitous in experimental and engineering applications containing the usually challenging task of signaling code. This problem is the question of integer factorization, i.e., the rot of a composite integer into a product of tinier integers, restricted herein expected prime integers. This is an intractable question that might admit legitimate-time hardware answers for small bit sizes. This episode suggests manual and automated ascendable solutions for integer factorization established equation answering over big Boolean algebras. The manual solution is pictorial over a form of 8-variable Karnaugh maps that is very regular and transposable. This solution covers the problem of 6 item, which includes the questions of 5, 4, and 3 bits as special cases. Additionally, an electrical solution is secondhand, and the findings are then proved and briefly explained. These verdicts demonstrate the famous evolution of temporal and dimensional complexity with growing input dose count. In future work, the largest possible fittings circuit that could be acquired via the automated answer is to be assembled, verified and tested. The complicatedness in our solution comes from two beginnings. One involves the task of judgment the Boolean expressions for the solution. This task is slow, but it has expected done once, and only already, for a problem of a likely size. The hardware exercise (e.g., an FPGA implementation) commit serve as a ready legitimate-time look-up solution not only of the suitable problem but also of all tinier problems.

Author(s) Details:

Ali Muhammad Rushdi,
Department of Electrical and Computer Engineering, King Abdulaziz University, P.O. Box 80200, Jeddah 21589, Saudi Arabia.

Sultan Sameer Zagzoog,
Department of Electrical and Computer Engineering, King Abdulaziz University, P.O. Box 80200, Jeddah 21589, Saudi Arabia.

Ahmed Said Balamesh,
Department of Electrical and Computer Engineering, King Abdulaziz University, P.O. Box 80200, Jeddah 21589, Saudi Arabia.

Please see the link here: https://stm.bookpi.org/RHMCS-V2/article/view/8571

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