Wednesday, 14 September 2022

Low Power Sigma Delta Modulator Design | Book Publisher International

 The difficulties faced by integrated circuit designers are caused by fluctuations in process (P), supply voltage (V), and temperature (T), which are complicated by low power design. Process insensitive design approach needs to be adjusted to the circuit/block design in order to take into account PVT changes. Using a process-insensitive design approach, a low-power, temperature-adjusted operational amplifier (Op-Amp) design is covered. The adjusted Op-current Amp's source is made to be more tolerant to process and temperature fluctuations. The suggested Op-performance Amp's is measured against the uncompensated Op-Amp using a variety of performance metrics. When doing Monte-Carlo simulations, the threshold voltage (Vth) variations are taken into account, and the design is improved to produce fewer variations than the uncompensated structures. A low power continuous time sigma delta modulator with an 18 KHz bandwidth and a 64 oversampling ratio (OSR) is created using the proposed compensated Op-Amp. With the suggested compensated Op-Amp, key building components for a sigma delta modulator, such as a difference amplifier and integrator, are constructed. To further reduce power consumption and improve process tolerance, the remaining modulator building components, such as the band gap voltage reference (BGR) circuit and 1-bit SRAM latch, have also been updated. Sigma-delta modulator overall power consumption with these enhanced blocks and compensated Op-Amp is 236 W, compared to 1960 W with uncompensated Op-Amp. As a result, the suggested sigma delta modulator uses less power while providing improved PVT variation tolerance.


Author(s) Details:

Dr. D. Anitha,
Department of ECE, GITAM University, India.

Dr. Md. Masood Ahmad,
Department of ECE, GITAM University, India.

Please see the link here: https://stm.bookpi.org/LPSDMD/issue/view/798

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