THD Inspection of a Novel Envelop with a T Type (E-T) Multilevel Inverter with Reduced Switch Count | Chapter 8 | Engineering Research: Perspectives on Recent Advances Vol. 5

Modern-day switching has made inverters into complex circuitry with multiple levels. The overall power ratings of the inverters are improved by individual small powered devices. The unique structure of a multilevel inverter (MLI) synthesizes higher voltage levels with lower harmonics, without using transformers or series-connected synchronized switching devices. Multilevel inverters are a good choice for medium and low power applications. Multilevel inverters have found a wide place in the market for their good power quality output. This paper proposes a new Envelope with T type Novel Multilevel inverter with unequal sources and reduced switch count. The working principle of the circuit is explained. Firing angle calculations are done using a simple looping technique and later Genetic Algorithm is used to obtain optimum firing angles using the Selective Harmonic Elimination technique and improve the THD of the output voltage. Comparison is made between different types of inverters. The proposed E-T Type inverter circuit uses less number of semiconductor switches compared to previous circuits. Hence, it is concluded that the proposed inverter can be used for speed control of drives.

 

Author (s) Details

 

Rashmy Deepak
Department of Electrical and Electronics Engineering, RNS Institute of Technology, Bangalore, India.

 

S Sumathi
RNSIT, Bangalore, India.

 

Please see the book here:- https://doi.org/10.9734/bpi/erpra/v5/4562

Generalised Space Vector Pulse Width Modulation Method for Multilevel Inverters Including over Modulation Region and Its Implementation with FPGA | Book Publisher International

Due to their low electromagnetic interference and high efficiency, multilevel power converters are power electronic topologies for utility applications requiring medium voltage and megawatt level as well as high power motor drive applications. These inverters can address issues with conventional two level inverters. Although there are numerous pulse width modulation schemes (such as multi carrier, inter leaved strategies, and sigma-delta) for switching multilayer inverters, these strategies unfortunately did not live up to the demands of contemporary drives. Therefore, Space Vector Pulse Width Modulation is the most used modulation method because it allows higher DC link utilisation and fewer harmonic distortion.

Any drive must meet the primary requirement of implementation feasibility since it must correctly reproduce the theoretical performance in real time while also being cost-effective. Any level inverter can use the generalised SVPWM method presented in this book. Through overmodulation, SVPWM allows the output voltage limit to be removed. Since the drive's extended speed-torque and power characteristics are sought, the overmodulation is essential. The functioning of the generalised SVPWM algorithm for any level inverter has not been described, which offers notable research opportunities. The over modulation in SVPWM controlled Multilevel inverters is not an easy problem to solve. The overmodulation region has been split into OVM-I and OVM-II due to the nature and performance boundaries. The trajectory of the voltage reference in over modulation breeds as a piecewise continuous function and combines circular and hexagonal boundaries. Under modulation and over modulation techniques are both used in the extremely sophisticated and hybrid over modulation method for SVPWM. For both Cascaded H-Bridge and Diode Clamped Inverters, host PWM techniques of SVPWM in over modulation in typical dual-mode strategy, typical single-mode strategy, minimum phase angle error strategy, and minimum amplitude strategies have been observed. The bulk of PWM overmodulation algorithms are sophisticated, limited to three levels only, and necessitate complicated optimization procedures with solutions to nonlinear equations. Both Cascaded and Diode Clamped multilevel inverters can use this broader SVPWM method, including over the modulation area. This approach is tested experimentally for five, seven level Cascaded Inverters, and seven level Diode Clamped Multilevel Inverters with Induction motor load utilising the Spartan 3A FPGA processor.

Analysis of the inverter's performance in terms of voltage, current THD, and fundamental line voltage magnitude is done, and the over modulation region is also looked into. Consequently, the filter size needed by the inverter used in industrial applications is reduced. the need for sinusoidal output voltage.

This book offers a generalised SVPWM algorithm that includes over modulation with generalised on-line switching methods, leveraging the desired and redundant switching states for reduction of THD, aside from the FPGA implementation of MLI-SVPWM.

 

Author (s) Details

B. Sirisha

Department of EEE, University College of Engineering Osmania University, Hyderabad, India.

 

Please see the link here:-  https://stm.bookpi.org/GSVPWMMMIIMRIFPGA/issue/view/730